Assignment:Hierarchal design

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Hands-on design training for MultiMEMS
D. Lapadatu and P. Ohlckers

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| 3. Assignment:Hierarchal design

The goal of this assignment is to learn how a layout is organized in cells and assemblies. The basic idea is that you draw things once and use multiple times. One example from the IC industry could for instance be if you have a design with a bunch of 8k resistors and the process is altered, giving a different sheet resistance than in the old process. Instead of having to update each resistor, you could just update one, and all other copies/instances of it will be updated accordingly.
The starting point for this assignment is the files we made in Assignment 2:Piezoresistor. If you haven't done or finished this assignment, the required files are available under Suggested solution under Assignment 2:Piezoresistor .

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STIMESI training on MULTIMEMS |
Last updated: June. 2009 24.06.2009